Intel defends architectural advances
Published: 10 Mar 2006 16:30 GMT
Intel's Mooly Eden is excited. Which means he's in the mood to make big promises.
The irreverent Israeli is now general manager of Intel's Mobile Platforms Group, but he occupies a special role in the company's history as one of the driving forces behind the original Pentium M processor. The chip's combination of low power consumption and high performance emerged from Intel's design labs in Israel, where the company's Core Duo chip was also conceived.
Intel is getting ready to introduce new chips based on what it calls its next-generation microarchitecture, a Pentium M-inspired set of design principles that are today's reason behind Eden's excitement. Though the company's stock has suffered from its recent market share losses to AMD, the new chips scheduled for the second half of the year will help Intel regain the performance crown, according to Eden. In fact, he thinks they'll be as much as 20 percent better than AMD products released at the same time, based on internal testing and projections of AMD's public road map information.
Eden sat down with ZDNet UK sister site CNET News.com to defend his predictions about the new chips and explain why the new architecture detailed at this week's Intel Developer Forum is just what Intel needs.
With Yonah, people bring up the unified cache. AMD has dedicated cache in its chip core. How much performance does that add? Or is it mostly just flexibility?
It's huge. The question is, what is the application that you're speaking about? Let's look at several different applications and see how much performance I can gain. Let's say you take Yonah, compare it to the competition and run single-threaded applications. A huge difference — because now one of my cores will be able to use all the 2MB cache. If I pick any one of those [cores] and I increase it from 1MB cache to 2MB cache, you can easily get 10 to 15 percent performance improvement.
This is what we are afraid of when we say we go with dual-core. We might find ourselves in a situation that we deliver great performance in a multitasking or a multithreaded environment. But if you go to a single-threaded environment, a lot of the software developers might come and say, "Whoops, my experience on the new system is worse than my experience with the previous one." So the fact that you can use the overall cache (on single-threaded applications) — this definitely gives you a huge advantage.
Yonah just came out, but what still will need to be changed or improved in notebook architecture? And what will be the next things that you want to start working on?
The reason we're so proud of [the next-generation microarchitecture] in the technical community is because it's much more challenging than Dothan. Dothan and Banias are exactly the same architecture. We just (shrank) it and added 2MB cache. We did a lot of local microarchitecture surgery, but it was local.
Merom — it's going to be 14 pipeline stages, and instead of a three-wide machine, you put in a four-wide machine and you change the branch prediction. [A four-wide machine means a chip can process four instructions in a single clock cycle.] It's really a major change in clock and in the amount of time it takes you to execute a sequence through different pipelines to make sure that this is fully compatible.
I believe that with innovation and the things that are being put into Merom, it will take at least a year and a half or two years to close such a gap. I'm not afraid to open up...
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